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Interfacing RAM with the CPU

Now we have connected two chips to the CPU's bus. One is ROM/Flash, about which we discussed in the previous article. Now second chip, which is a RAM chip, also connected to the same bus. This RAM chip has got only 64 bytes of memory. CPU can both read and write into this RAM. Where as CPU can only read from the ROM. The RAM chip will have only 6 address pins. The CPU's address bus lines A0 to A5 are connected to these 6 address lines. All 8 data lines of CPU bus are connected to the 8 data pins of RAM chip. Read and Write control lines are also connected to the RAM chip.

When CPU places the address in the range of 0x80 to 0xBF, then address decoder will activate chip select line connected to the RAM chip. When RAM chip is selected with chip select line, the address pins (A0 t A5) will select one memory location.

The memory read cycle for RAM will work exactly as described in the previous article for ROM. Now let us look at the memory write cycle.

When CPU wishes to perform meory write to RAM, it places the address in the range of 0x80 to 0xBF on the address bus lines. On seeing this address, the address decoder will activate the chip select line connected to the RAM chip. The address lines A0 to A5 will select a particular memory location. While placing the address on the address lines, CPU also will place the data to write, on the data lines. In this case data lines are acting as output lines from the CPU. The data placed by the CPU will reach the RAM chip's data pins. Now CPU activates the write control pin. This write control pin reaches to the RAM chip and informs RAM to perform write operation. Then RAM will take whatever is there on the data lines and writes to the selected memory location.

Note that in the memory read cycle, CPU's data lines act as input lines. Memory chip drives these data lines, and CPU reads the data from the data lines. Where as in the memory write cycle, CPU's data lines act as output lines. CPU drives the data lines and memory chip reads the data lines. Because of this, we call data bus as bi-directional bus. In the figure, data bus is having arrow end on both the sides. Address bus lines are always output lines. CPU only puts the address on the address lines. These lines are input to the address decoder chip and selected chip.

Also note that, selection will happen at two levels. On top level, chip will be selected first. Once chip is selected, the address pins of the selected chip will select the individual location in the chip. Finally read and write pins of the chip gets the direction of data move for the selected location.


Answer the following questions to check the understanding of the subject

1. What are the lowest and highest addresses of ROM and RAM memory locations?
2. What is the size of RAM chip and how many address pins should be present on 
   the RAM chip?
3. Address bus is uni-directional bus, where as data bus is bi-directional,
   explain the reason for this.
4. When address is placed by the CPU on address lines, the selection of
   memory location will happen at two levels. What are these two levels?
   Why two levels are required?

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